DSP Processor Fundamentals: Architectures and Features by Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee PDF

By Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee

ISBN-10: 0780334051

ISBN-13: 9780780334052

This state-of-the-art, functional consultant brings you an autonomous, accomplished advent to DSP processor know-how. a radical educational and review of DSP architectures, this ebook contains a huge variety of todays product choices in examples that illustrate DSP positive factors and features. This booklet is mainly priceless to digital structures designers, processor architects, engineering managers, and product planners.From the again CoverElectrical Engineering/Signal Processing DSP Processor basics Architectures and contours A quantity within the IEEE Press sequence on sign Processing Jerry D. Gilbson, sequence Editor because the emergence of the 1st commercially profitable electronic sign processors within the early Nineteen Eighties, the programmable DSP marketplace has burgeoned. Designers can now choose between an enormous array of specialised processors with robust signal-processing features. DSP Processor basics provides an self sustaining, accomplished advent to DSP processor know-how. an intensive instructional and review of DSP architectures, this e-book features a huge diversity of today’s product choices in examples that illustrate DSP positive aspects and functions. This e-book is principally worthwhile to digital platforms designers, processor architects, engineering managers, and product planners. issues coated include:•Numeric formats•Data paths•Memory structures•Instruction sets•Execution control•Pipelining•On-chip peripherals•On-chip debugging facilities•Clocking options•And more!sharingmatrix.com

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In some processors, a limited-capability shifter is located immediately after the multiplier, so that multiplication results can be scaled before being passed to the accumulator or ALU for further processing. Some nsp processors provide multiple shifters with different capabilities in different places in the data path. This allows greater flexibility to perform shifting in the most appropriate places for each algorithm being implemented. For example, the nSP5600x has two independent, limited-capability shifters: one is used to scale multiply-accumulate results as they are written from the accumulator to memory, and the other is used to shift values within the accumulator, including logical (no sign extension) and rotate-type shifts.

A normal move instruction to preload the appropriate constant into the accumulator, or by adding the constant to the accumulator prior to truncation. The fact that round-to-nearest rounding always rounds numbers that lie exactly at the midpoint between the two nearest output values to the higher output value introduces an asymmetry. If we round a typical set of signal values in this way, on average more values are rounded up than are rounded down. This means that the round-to-nearest operation adds a bias to signals.

We use data path to refer to the complete arithmetic processing path, including multipliers, accumulators, and the like. Figure 4-1 illustrates a typical fixed-point data path, in this case from the Motorola DSP5600x, a 24-bit, fixed-point processor. The data path in nsp processors is generally not used for most memory address calculations. Instead, fixed-point nsp processors usually provide a separate hardware unit for address calculation. Often called an address generation unit, this hardware typically performs a rich variety of address calculations, such as modulo addressing and bit-reversed addressing.

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DSP Processor Fundamentals: Architectures and Features by Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee

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